.png){kind=logo}
No cost, no commitment - we'll make a personal intro
SP
Satya Pandya
Junior IC Design Engineer specializing in ASIC/FPGA RTL design and verification
Western SemiconductorStony Brook UniversityTempe, AZ3 Years ExperienceIntern LevelWorks On-Site
Connect with Satya
Satya already has a relationship with Reval, so a warm intro from us gets a much better response than cold outreach.
Typically responds within 24 hours
Recommended
Already have an account?
Hire with RevalPost a Role90-day money-back guarantee
Find your next great hire
Our AI agents source, screen, and vet candidates for your open roles. Get qualified candidates within 48 hours.
$250one-time kickoff
10%on successful hire
Experience
IC Design InternWestern Semiconductor · Feb 2025 – Mar 2025internship
ASIC InternMIT Beaver Institute · Jun 2024 – Aug 2024internship
Systems EngineerTransUnion · Oct 2019 – Jul 2022
Want to connect with Satya? We'll make a personal introduction.
Education
Stony Brook Universitymaster, Electrical Engineering (2024)
GITAM Universitybachelor, Electronics and Communication Engineering (2018)
Skills
C++PythonLinuxGitMonitoringTroubleshootingFull-Stack DevelopmentSystemVerilogVerilogRTL DesignFunctional VerificationASIC DesignFPGA DesignObject-Oriented ProgrammingUVM
Languages
English
Interested in Satya?
We'll personally introduce you - no strings attached.
For Hiring TeamsPost a Role90-day money-back guarantee. A fraction of traditional agency fees.
Build your dream team with Reval
Our AI agents source, screen, and vet candidates for your open roles. Get qualified, high-intent candidates on your desk within 48 hours.
$250one-time kickoff
10%on successful hire
48hrsto first candidates
Discover more candidates like Satya
Search across thousands of pre-screened, high-quality, high-intent candidates on Reval.
Search Talent