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Bhargavi Lukalapu

Mid-level Physical Design Engineer specializing in low-power SoC RTL-to-GDSII

AZ, USAPhysical Design Engineer5 years experienceMid-LevelSemiconductorsTechnologyElectronic Design Automation (EDA)
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Experience

Physical Design EngineerMicrochip Technology Inc.
Physical Design EngineerHCL Technologies

Education

Arizona State Universitymaster, Computer Engineering (Electrical Engineering) (2024)
Chaitanya Bharathi Institute of Technology, Osmania Universitybachelor, Electronics and Communication Engineering (2019)

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Languages

English

Skills

ASIC DesignAnalog DesignArea RecoveryAutomation of Design FlowsBlock-Level Physical IntegrationCadence InnovusCadence TempusCadence VirtuosoCadence VoltusCalibreClock Domain Crossing (CDC)Clock GatingClock Tree Synthesis (CTS)Congestion AnalysisCustom Tool Development